Post date: Apr 11, 2018 2:34:30 AM
Dear All,
Test 2 for Digital Electronics will be held as follows:
Date: 16/04/2017 (Monday)
Time: 5.30-6.30pm
Venue: P16 Demo 1
Test Covers: Module 4 until Module 6 (Decoder).
Hints: Module 4 - SOP & POS, Maxterm, Minterm, K-map, Gate transformation, truth table. & Combinational Logic Design
Module 5 - Calculation not covers in test. Only theoretical.
Module 6 - Multiplexer and Decoder only.